Computer Organization and Architecture

Unit

Contents

Hours

1

Data representation and Computer Arithmetic

Review of Decimal, Binary, Octal, Hexadecimal Number systems and their inter-conversion, BCD code, Gray code, Excess-3 code, ASCII , EBCDIC, Unicode, Signed and Unsigned numbers, 1’s and 2’s complements, Binary arithmetic.

04

2

Boolean Algebra & Logic Gates

Boolean theorems, Boolean Laws, De Morgan’s Theorem, Reduction of Logic expression using Boolean Algebra, Introduction to Logic (AND, OR, NOT), Classification of Logic gates, Universal Logic gates, Implementation of other gates using universal gates. Basic concepts of Karnaugh map, minterm and maxterm.

07

3

Combinational Circuits

Definition of combinational circuits, Detail study of Half adder, Full adder, Half subtractor, Full subtractor, Multiplexer (4:1) & Demultiplexer(1:4), Encoder (8-line-to- 3-line) and Decoder (3-line-to-8-line), Parity generator and checker, Block diagram of

ALU.

07

4

Sequential Circuits

Definition of sequential circuits, Detail study of Flip Flops and truth tables: S-R FF, JK FF, T and D type FFs, Flip flop as memory device. Counters: Asynchronous-Mod16, Mod-10, Mod-8, up down counter, Synchronous- Ring counter, Event counter. Shift Registers and their types, serial to parallel and parallel to serial converters using shift registers.

07

5

CPU, Memory and I/O Organization

Block diagram of CPU, functions of CPU, general register organization, flags, Concept of RISC and CISC Memory System hierarchy, Cache Memory, Internal Memory, External Memory, Concept of Virtual Memory. Basics of I/O Organisation: types of I/O data transfers.

05

Unit

Contents

Hours

1

Data representation and Computer Arithmetic

Review of Decimal, Binary, Octal, Hexadecimal Number systems and their inter-conversion, BCD code, Gray code, Excess-3 code, ASCII , EBCDIC, Unicode, Signed and Unsigned numbers, 1’s and 2’s complements, Binary arithmetic.

04

2

Boolean Algebra & Logic Gates

Boolean theorems, Boolean Laws, De Morgan’s Theorem, Reduction of Logic expression using Boolean Algebra, Introduction to Logic (AND, OR, NOT), Classification of Logic gates, Universal Logic gates, Implementation of other gates using universal gates. Basic concepts of Karnaugh map, minterm and maxterm.

07

3

Combinational Circuits

Definition of combinational circuits, Detail study of Half adder, Full adder, Half subtractor, Full subtractor, Multiplexer(4:1) & Demultiplexer(1:4), Encoder (8-line-to- 3-line) and Decoder (3-line-to-8-line), Parity generator and checker, Block diagram of ALU.

07

4

Sequential Circuits

Definition of sequential circuits, Detail study of Flip Flops and truth tables: S-R FF, J- K FF, T and D type FFs, Flip flop as memory device.  Counters: Asynchronous-Mod16, Mod-10, Mod-8, up down counter, Synchronous- Ring counter, Event counter.  Shift Registers and their types, serial to parallel and parallel to serial converters using shift registers.

07

5

CPU, Memory and I/O Organization

Block diagram of CPU, functions of CPU, general register organization, flags, Concept of RISC and CISC. Memory System hierarchy, Cache Memory, Internal Memory, External Memory, Concept of Virtual Memory. Basics of I/O organisation: types of I/O data transfers.

05

Unit

Contents

Hours

1

Data Representation and Computer Arithmetic

Review of Decimal, Binary, Octal, Hexadecimal Number systems and their inter-conversion, BCD code, Gray code, Excess-3 code, ASCII , EBCDIC, Unicode, Signed and Unsigned  numbers, 1’s and 2’s complements, Binary arithmetic.

04

2

Boolean Algebra & Logic Gates

Boolean theorems, Boolean Laws, De Morgan’s Theorem, Reduction of Logic expression using Boolean Algebra, Introduction to Logic (AND, OR, NOT), Classification of Logic gates, Universal Logic gates, Implementation of other gates using universal gates. Basic concepts of Karnaugh map, minterm and maxterm.

07

3

Combinational Circuits

Definition of combinational circuits, Detail study of Half adder, Full adder, Half  subtractor, Full subtractor, Multiplexer(4:1) & Demultiplexer(1:4), Encoder (8-line-to-  3-line) and Decoder (3-line-to-8-line), Parity generator and checker, Block diagram of ALU.

07

4

Sequential Circuits

Definition of sequential circuits, Detail study of Flip Flops and truth tables: S-R FF, J- K FF, T and D type FFs, Flip flop as memory device.  Counters: Asynchronous-Mod16, Mod-10, Mod-8, up down counter, Synchronous - Ring counter, Event counter. Shift Registers and their types, serial to parallel and parallel to serial converters using  shift registers.

07

5

CPU, Memory and I/O Organization

Block diagram of CPU, functions of CPU, general register organization, flags, Concept of RISC and CISC  Memory System hierarchy, Cache Memory, Internal Memory, External Memory, Concept of  Virtual Memory.  Basics of I/O organisation: types of I/O data transfers

05